The present disclosure generally relates to semiconductor devices, and more specifically, to semiconducting materials on silicon substrates.
Semiconducting III-V compounds and materials, e.g., indium-gallium-arsenic (InGaAs) and indium-gallium-antimony (InGaSb), in transistor channel devices have low band gaps and high carrier mobility properties. However, integrating the III-V materials on silicon (Si) or germanium (Ge) substrates is challenging. Generally, conventional III-V materials on Si substrates need a relatively thick buffer layer to achieve an acceptable defect density. Defects, such as stacking faults and dislocations can occur with high defect densities due the lattice mismatch between the III-V and the substrate.
Thick buffer layers, including graded buffer layers, can take extensive time to form and may not provide the desired defect density. For example, a thick graded buffer layer to integrate a III-V material on Si may only achieve a defect density of about 2×109 defects/centimeter2 (defects/cm2), which is demonstrated by Intel Corp.